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DS28EC20: 20Kb 1-Wire EEPROM
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
EEPROM
Programming Current
Programming Time
Write/Erase Cycles
(Endurance) (Notes 21,
22)
Data Retention
(Notes 23, 24, 25)
I PROG
t PROG
N CY
t DR
(Note 19)
(Note 20)
At +25°C
At +85°C (worst case)
At +85°C (worst case)
200k
50k
40
0.9
10
mA
ms
?
years
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
Note 14:
Note 15:
Note 16:
Note 17:
Note 18:
Note 19:
Note 20:
Note 21:
Note 22:
Note 23:
Note 24:
Note 25:
Limits are 100% production tested at T A = +25°C and/or T A = +85°C. Limits over the operating temperature range and relevant
supply voltage range are guaranteed by design and characterization. Typical values are not guaranteed.
System requirement.
Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system, 1-Wire recovery times, and
current requirements during EEPROM programming. The specified value here applies to systems with only one device and with
the minimum 1-Wire recovery times. For more heavily loaded systems, an active pullup such as that found in the DS2482-x00,
DS2480B, or DS2490 may be required.
Typical value represents the internal parasite capacitance when V PUP is first applied. Once the parasite capacitance is charged, it
does not affect normal communication.
Guaranteed by design, characterization and/or simulation only. Not production tested.
V TL , V TH , and V HY are a function of the internal supply voltage which is itself a function of V PUP , R PUP , 1-Wire timing, and
capacitive loading on I/O. Lower V PUP , higher R PUP , shorter t REC , and heavier capacitive loading all lead to lower values of V TL , V TH ,
and V HY .
Voltage below which, during a falling edge on I/O, a logic 0 is detected.
The voltage on I/O needs to be less or equal to V ILMAX at all times the master is driving I/O to a logic 0 level.
Voltage above which, during a rising edge on I/O, a logic 1 is detected.
After V TH is crossed during a rising edge on I/O, the voltage on I/O has to drop by at least V HY to be detected as logic 0.
The I-V characteristic is approximately linear for voltages less than 1V.
Applies to a single device attached to a 1-Wire line.
The earliest recognition of a negative edge is possible at t REH after V TH has been reached on the preceding rising edge.
Defines maximum possible bit rate. Equal to 1/(t W0LMIN + t RECMIN ).
Interval after t RSTL during which a bus master can read a logic 0 on I/O if there is a DS28EC20 present. The power-up presence
detect pulse could be outside this interval but will be complete within 2ms after power-up.
Highlighted numbers are NOT in compliance with legacy 1-Wire product standards. See comparison table below.
ε in Figure 11 represents the time required for the pullup circuitry to pull the voltage on I/O up from V IL to V TH . The actual
maximum duration for the master to pull the line low is t W1LMAX + t F - ε and t W0LMAX + t F - ε , respectively.
δ in Figure 11 represents the time required for the pullup circuitry to pull the voltage on I/O up from V IL to the input high threshold
of the bus master. The actual maximum duration for the master to pull the line low is t RLMAX + t F .
Current drawn from I/O during the EEPROM programming interval. During a programming cycle the voltage at I/O drops by I PROG
× R PUP below V PUP . If V PUP and R PUP are within their EC table limits, the residual I/O voltage meets the guaranteed-by-design
minimum voltage requirements for programming.
The t PROG interval begins t REHMAX after the trailing rising edge on I/O for the last time slot of the E/S byte for a valid copy scratchpad
sequence. Interval ends once the device's self-timed EEPROM programming cycle is complete and the current drawn by the
device has returned from I PROG to I L .
Write-cycle endurance is degraded as T A increases.
Not 100% production-tested; guaranteed by reliability monitor sampling.
Data retention is degraded as T A increases.
Guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to data sheet
limit at operating temperature range is established by reliability testing.
EEPROM writes may become nonfunctional after the data retention time is exceeded. Long-time storage at elevated
temperatures is not recommended; the device may lose its write capability after 10 years at +125°C or 40 years at +85°C.
LEGACY VALUES
DS28EC20 VALUES
PARAMETER
STANDARD SPEED
OVERDRIVE SPEED#
STANDARD SPEED
OVERDRIVE SPEED#
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
t SLOT (incl. t REC )
t RSTL
t PDH
t PDL
t W0L
61μs
480μs
15μs
60μs
60μs
(undefined)
(undefined)
60μs
240μs
120μs
7μs
48μs
2μs
8μs
6μs
(undefined)
80μs
6μs
24μs
16μs
65μs*
480μs
15μs
60μs
60μs
(undefined)
640μs
60μs
240μs
120μs
11μs
48μs
2μs
8μs
6μs
(undefined)
80μs
6μs
24μs
15.5μs
* Intentional change, longer recovery time requirement due to modified 1-Wire front-end.
# For operation at overdrive speed, the DS28EC20 requires V PUP to be 5V ±5%.
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